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1 ltc1821 applicatio s u descriptio u features typical applicatio u 16-bit, ultra precise, fast settling v out dac the ltc 1821 is a parallel input 16-bit multiplying voltage output dac that operates from analog supply voltages of 5v up to 15v. inl and dnl are accurate to 1lsb over the industrial temperature range in both unipolar 0v to 10v andbipolar 10v modes. precise 16-bit bipolar 10v outputs are achieved with on-chip 4-quadrant multiplication resistors.the ltc1821 is available in a 36-lead ssop package and is specified over the industrial temperature range. the device includes an internal deglitcher circuit that reducesthe glitch impulse to less than 2nv? (typ). the ltc1821 settles to 1lbs in 2 m s with a full-scale 10v step. the combination of fast, precise settling and ultra low glitch makethe ltc1821 ideal for precision industrial control applica- tions. the asynchronous clr pin resets the ltc1821 to zero scale and resets the ltc1821-1 to midscale. process control and industrial automation precision instrumentation direct digital waveform generation software-controlled gain adjustment automatic test equipment , ltc and lt are registered trademarks of linear technology corporation. ltc1821/ltc1821-1 integral nonlinearity 16-bit, 4-quadrant multiplying dac with a minimum of external components digital input code 0 integral nonlinearity (lsb) 1.00.8 0.6 0.4 0.2 0 0.2 0.4 0.6 0.8 1.0 16384 32768 1821 ta02 49152 65535 v ref = 10v v out = 10v bipolar v cc ltc1821-1 r fb i out r fb r ofs r ofs 5v ld ld 10 9 32 24 23 7 2 6 15pf 17 16 20 13 15 v v + r1 r com 8 ref 11 12 14 0.1 f 1 22 v out 15pf v out = 1821 ta01 dgnd nc agnds agndf + lt 1468 wr 3 to 6, 25 to 36 wr clr clr 16-bit dac r1 r2 16 data inputs 0.1 f 15v 15v 0.1 f + 21 dnc* 19 dnc* 18 *do not connect dnc* v ref ? ref v ref ? ref 2 m s settling to 0.0015% for 10v step 1lsb max dnl and inl over industrialtemperature range on-chip 4-quadrant resistors allow precise 0v to10v, 0v to ?0v or 10v outputs low glitch impulse: 2nv? low noise: 13nv/ ? hz 36-lead ssop package power-on reset asynchronous clear pinltc1821: reset to zero scale ltc1821-1: reset to midscale downloaded from: http:///
2 ltc1821 v cc to agndf, agnds ............................... 0.3v to 7v v cc to dgnd .............................................. 0.3v to 7v total supply voltage (v + to v ) ............................... 36v agndf, agnds to dgnd ............................. v cc + 0.3v dgnd to agndf, agnds ............................. v cc + 0.3v ref, r com to agndf, agnds, dgnd .................. 15v r ofs , r fb , r1, to agndf, agnds, dgnd ............ 15v digital inputs to dgnd ............... 0.3v to (v cc + 0.3v) i out to agndf, agnds............... 0.3v to (v cc + 0.3v) maximum junction temperature .......................... 150 c operating temperature range ltc1821c/ltc1821-1c .......................... 0 c to 70 c ltc1821i/ltc1821-1i ....................... 40 c to 85 c storage temperature range ................ 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c (note 1) order part number ltc1821acgwltc1821bcgw ltc1821-1acgw ltc1821-1bcgw ltc1821aigw ltc1821bigw ltc1821-1aigw ltc1821-1bigw t jmax = 125 c, q ja = 80 c/ w 12 3 4 5 6 7 8 9 1011 12 13 14 15 16 17 18 top view gw package 36-lead plastic ssop wide 3635 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 d4d5 d6 d7 d8 d9 d10 d11 d12 d13 d14 d15 wr ld nc dnc* v dnc* dgnd v cc d3d2 d1 d0 clr ref r com r1 r ofs r fb v out i out v + agnds agndf dnc* the denotes specifications which apply over the full operating temperature range, otherwise specifications are t a = t min to t max , v + = 15v, v = 15v, v cc = 5v, v ref = 10v, agndf = agnds = dgnd = 0v. *do not connect ltc1821b/-1b ltc1821a/-1a symbol parameter conditions min typ max min typ max units accuracy resolution 16 16 bits monotonicity 16 16 bits inl integral nonlinearity t a = 25 c (note 2) 2 0.25 1l s b t min to t max 2 0.35 1l s b dnl differential nonlinearity t a = 25 c 1 0.2 1l s b t min to t max 1 0.2 1l s b ge gain error unipolar mode t a = 25 c (note 3) 16 5 16 lsb t min to t max 24 8 16 lsb bipolar modet a = 25 c (note 3) 16 2 16 lsb t min to t max 24 5 16 lsb gain temperature coefficient d gain/ d temperature (note 4) 1 3 1 3 ppm/ c unipolar zero-scale error t a = 25 c 3 0.25 2l s b t min to t max 6 0.50 4l s b bipolar zero error t a = 25 c 12 2 8l s b t min to t max 16 3 10 lsb psrr power supply rejection ratio v cc = 5v 10% 2 0.7 2 lsb/v v + , v = 4.5v to 16.5v 2 0.1 2 lsb/v absolute m axi m u m ratings w ww u package/order i n for m atio n w u u electrical characteristics consult factory for parts specified with wider operating temperature ranges. downloaded from: http:///
3 ltc1821 the denotes specifications which apply over the full operating temperature range, otherwise specifications are t a = t min to t max , v + = 15v, v = 15v, v cc = 5v, v ref = 10v, agndf = agnds = dgnd = 0v. electrical characteristics symbol parameter conditions min typ max units reference input r ref dac input resistance (unipolar) (note 6) 4.5 6 10 k w r1/r2 r1/r2 resistance (bipolar) (notes 6, 11) 91 22 0 k w r ofs , r fb feedback and offset resistances (note 6) 91 22 0 k w ac performance (note 4) output voltage settling time d v out = 10v (notes 7, 8) 2 m s midscale glitch impulse (note 10) 2 nv? digital-feedthrough (note 9) 2 nv? multiplying feedthrough error v ref = 10v, 10khz sine wave (note 7) 1 mv p-p multiplying bandwidth code = full scale (note 7) 600 khz output noise voltage density 1khz to 100khz (note 7) code = zero scale 13 nv/ ? hz code = full scale 20 nv/ ? hz output noise voltage 0.1hz to 10hz (note 7) code = zero scale 0.45 m v rms code = full scale 1 m v rms 1/f noise corner (note 7) 30 hz analog outputs (note 4) v out dac output swing r l = 2k, v + = 15v, v = 15v 12.6 v r l = 2k, v + = 5v, v = 5v 2.6 v dac output load regulation v + = 15v, v = 15v, 5ma load 0.02 0.2 lsb/ma i sc short-circuit current v out = 0v, v + = 15v, v = 15v 12 40 ma sr slew rate r l = 2k, v + = 15v, v = 15v 20 v/ m s r l = 2k, v + = 5v, v = 5v 14 v/ m s digital inputs v ih digital input high voltage 2.4 v v il digital input low voltage 0.8 v i in digital input current 0.001 1 m a c in digital input capacitance (note 4 ) v in = 0v 8p f timing characteristics t ds data to wr setup time 60 20 ns t dh data to wr hold time 0 1 2 n s t wr wr pulse width 60 25 ns t ld ld pulse width 110 55 ns t clr clear pulse width 60 40 ns t lwd wr to ld delay time 0n s power supply i cc supply current, v cc digital inputs = 0v or v cc 1.5 10 m a i s supply current, v + , v 15v 4.5 7.0 ma 5v 4.0 6.8 ma v cc supply voltage 4.5 5 5.5 v v + supply voltage 4.5 16.5 v v supply voltage 16.5 4.5 v downloaded from: http:///
4 ltc1821 note 8: to 0.0015% for a full-scale change, measured from the rising edge of ld.note 9: ref = 0v. dac register contents changed from all 0s to all 1s or all 1s to all 0s. ld low and wr high.note 10: midscale transition code: 0111 1111 1111 1111 to 1000 0000 0000 0000. unipolar mode, c feedback = 33pf. note 11: r1 and r2 are measured between r1 and r com , ref and r com . note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired.note 2: 1lsb = 0.0015% of full scale = 15.3ppm of full scale. note 3: using internal feedback resistor. note 4: guaranteed by design, not subject to test. note 5: i out with dac register loaded to all 0s. note 6: typical temperature coefficient is 100ppm/ c. note 7: measured in unipolar mode. electrical characteristics typical perfor a ce characteristics uw time ( s) 0 output voltage (mv) ?0 0 10 0.6 1.0 1821 g01 ?0 ?0 ?0 0.2 0.4 0.8 20 30 40 c feedback = 30pf v ref = 10v 1nv-s typical frequency (hz) ?0 signal/(noise + distortion) (db) ?0 ?0 ?0 10 1k 10k 100k 1821 g03 110 100 ?0 ?0 100 v cc = 5v c feedback = 30pf reference = 6v rms 500khz filter 80khz filter 30khz filter ld pulse 5v/div gated settling waveform 500 m v/div 500ns/div 1821 g02 v ref = ?0v c feedback = 20pf 0v to 10v step frequency (hz) ?0 signal/(noise + distortion) (db) ?0 ?0 ?0 10 1k 10k 100k 1821 g04 110 100 ?0 ?0 100 v cc = 5v using an lt1468 c feedback = 15pf reference = 6v rms 500khz filter 80khz filter 30khz filter frequency (hz) ?0 signal/(noise + distortion) (db) ?0 ?0 ?0 10 1k 10k 100k 1821 g05 110 100 ?0 ?0 100 v cc = 5v using an lt1468 c feedback = 15pf reference = 6v rms 500khz filter 80khz filter 30khz filter intput voltage (v) 0 supply current (ma) 3 4 5 4 1821 g06 2 1 0 1 2 3 5 v cc = 5v all digital inputstied together midscale glitch impulse unipolar multiplying modesignal-to-(noise + distortion) vs frequency full-scale setting waveform bipolar multiplying modesignal-to-(noise + distortion) vs frequency, code = all zeros bipolar multiplying modesignal-to-(noise + distortion) vs frequency, code = all ones v cc supply current vs digital input voltage downloaded from: http:///
5 ltc1821 typical perfor a ce characteristics uw supply voltage (v) 0 0 logic threshold (v) 0.5 1.0 1.5 2.0 3.0 1 234 1821 g07 57 6 2.5 digital input code 0 1.0 integral nonlinearity (lsb) 0.8 0.4 0.2 0 1.00.4 16384 32768 1821 g08 0.6 0.6 0.8 0.2 49152 65535 digital input code 0 1.0 differential nonlinearity (lsb) 0.8 0.4 0.2 0 1.00.4 16384 32768 1821 g09 0.6 0.6 0.8 0.2 49152 65535 reference voltage (v) ?0 integral nonlinearity (lsb) 0.2 0.6 1.0 6 1821 g10 0.2 0.6 0 0.4 0.8 0.4 0.8 1.0 ? ? 2 ? 8 ? 0 4 10 reference voltage (v) ?0 integral nonlinearity (lsb) 0.2 0.6 1.0 6 1821 g11 0.2 0.6 0 0.4 0.8 0.4 0.8 1.0 ? ? 2 ? 8 ? 0 4 10 reference voltage (v) ?0 differential nonlinearity (lsb) 0.2 0.6 1.0 6 1821 g12 0.2 0.6 0 0.4 0.8 0.4 0.8 1.0 ? ? 2 ? 8 ? 0 4 10 reference voltage (v) ?0 differential nonlinearity (lsb) 0.2 0.6 1.0 6 1821 g13 0.2 0.6 0 0.4 0.8 0.4 0.8 1.0 ? ? 2 ? 8 ? 0 4 10 supply voltage (v) 1.0 integral nonlinearity (lsb) 0.8 0.4 0.2 0 1.00.4 2 4 5 1821 g14 0.6 0.6 0.80.2 3 6 7 v ref = 10v v ref = 10v v ref = 2.5v v ref = 2.5v supply voltage (v) integral nonlinearity (lsb) 2.0 ?.0 0.5 0 2.01.0 2 4 5 1821 g15 ?.5 1.50.5 3 6 7 v ref = 10v v ref = 10v v ref = 2.5v v ref = 2.5v logic threshold vs v cc supply voltage integral nonlinearity (inl) differential nonlinearity (dnl) integral nonlinearity vs referencevoltage in unipolar mode integral nonlinearity vs referencevoltage in bipolar mode differential nonlinearity vsreference voltage in unipolar mode differential nonlinearity vsreference voltage in bipolar mode integral nonlinearity vs v cc supply voltage in unipolar mode integral nonlinearity vs v cc supply voltage in bipolar mode downloaded from: http:///
6 ltc1821 typical perfor a ce characteristics uw supply voltage (v) 1.0 differential nonlinearity (lsb) 0.8 0.4 0.2 0 1.00.4 2 4 5 1821 g16 0.6 0.6 0.80.2 3 6 7 v ref = 10v v ref = 2.5v v ref = 10v v ref = 2.5v supply voltage (v) 1.0 differential nonlinearity (lsb) 0.8 0.4 0.2 0 1.00.4 2 4 5 1821 g17 0.6 0.6 0.80.2 3 6 7 v ref = 10v v ref = 10v v ref = 2.5v v ref = 2.5v differential nonlinearity vs v cc supply voltage in unipolar mode differential nonlinearity vs v cc supply voltage in bipolar mode unipolar multiplying mode frequencyresponse vs digital code bipolar multiplying mode frequencyresponse vs digital code bipolar multiplying mode frequencyresponse vs digital code frequency (hz) 100 120 attenuation (db) ?0 ?0 0 100 10k 100k 10m 1821 g18 1k 1m ?0 ?0 d15 ond14 on d13 on d12 on all bits ond9 on d1 on d0 on d11 ond10 on d8 ond7 on d6 on d5 on d4 on d3 on d2 on all bits off 30pf 8 9 10 11 14 13 11617 12 ltc1821 v out v ref frequency (hz) 100 attenuation (db) ?0 ?0 0 10 *dac zero voltage output limited by bipolar zero error to 96db typical (?8db max, a grade) 1k 10k 10m 1m 1821 g19 100 100k ?0 ?0 d15 and d14 ond15 and d13 on d15 and d12 on d15 and d11 on d15 and d10 on d15 and d9 on d15 and d8 on d15 and d7 on d15 and d6 on d15 and d5 on d15 and d4 on d15 and d3 on d15 and d2 on all bits on d15 on * d15 and d0 on d15 and d1 on codes from midscale to full scale 15pf 12pf + 12pf v ref v out 8 9 10 11 14 13 17 161 12 lt1468 ltc1821 2 3 6 frequency (hz) 100 attenuation (db) ?0 ?0 0 10 1k 10k 10m 1m 1821 g20 100 100k ?0 ?0 d14 ond14 and d13 on d14 to d12 on d14 to d11 on d14 to d10 on d14 to d9 on d14 to d8 on d14 to d7 on d14 to d6 on d14 to d5 on d14 to d4 on d14 to d3 on d14 to d2 on d14 to d1 on all bits off *dac zero voltage output limited by bipolar zero error to 96db typical (?8db max, a grade) d14 to d0 on d15 on * codes from midscale to zero scale 15pf 12pf + 12pf v ref v out 8 9 10 11 14 13 17 161 12 lt1468 ltc1821 2 3 6 downloaded from: http:///
7 ltc1821 i out (pin 14): dac current output. normally tied through a 22pf feedback capacitor in unipolar mode (15pf inbipolar mode) to v out . v + (pin 15): amplifier positive supply. range is 4.5v to 16.5v.agnds (pin 16): analog ground sense. connect to analog ground. agndf (pin 17): analog ground force. connect to analog ground. dnc (pin 18, 19, 21): connected internally. do not connect external circuitry to these pins.v (pin 20): amplifier negative supply. range is 4.5v to 16.5v. nc (pin 22): no connection. ld (pin 23): dac digital input load control input. when ld is taken to a logic high, data is loaded from the inputregister into the dac register, updating the dac output. wr (pin 24): dac digital write control input. when wr is taken to a logic low, data is written from the digital inputpins into the 16-bit wide input reigster. d15 (pins 25): msb or digital input data bit 15. d14 (pin 26): digital input data bit 14. d13 (pin 27): digital input data bit 13. d12 (pin 28): digital input data bit 12. d11 (pin 29): digital input data bit 11. d10 (pin 30): digital input data bit 10. d9 (pin 31): digital input data bit 9. d8 (pin 32): digital input data bit 8. d7 (pin 33): digital input data bit 7. d6 (pin 34): digital input data bit 6. d5 (pin 35): digital input data bit 5. d4 (pin 36): digital input data bit 4. dgnd (pin 1): digital ground. connect to analog ground. v cc (pin 2): positive supply input. 4.5v v cc 3 5.5v. requires a bypass capacitor to ground.d3 (pin 3): digital input data bit 3. d2 (pin 4): digital input data bit 2. d1 (pin 5): digital input data bit 1. d0 (pin 6): lsb or digital input data bit 0. clr (pin 7): digital clear control function for the dac. when clr is taken to a logic low, it sets the dac outputand all internal registers to: zero code for the ltc1821 and midscale code for the ltc1821-1. ref (pin 8): reference input and 4-quadrant resistor r2. typically 10v, accepts up to 15v. in 2-quadrant mode, tie this pin to the external reference signal. in 4-quadrantmode, this pin is driven by external inverting reference amplifier. r com (pin 9): center tap point of the two 4-quadrant resistors r1 and r2. normally tied to the inverting inputof an external amplifier in 4-quadrant operation. other- wise this pin is shorted to the ref pin. see figures 1 and 2. r1 (pin 10): 4-quadrant resistor r1. in 2-quadrant operation, short this pin to the ref pin. in 4-quadrantmode, tie this pin to the external reference signal. r ofs (pin 11): bipolar offset resistor. typically swings 10v, accepts up to 15v. for 2-quadrant operation, tie this pin to r fb and for 4-quadrant operation, tie this pin to r1.r fb (pin12): feedback resistor. normally connected to v out . typically swings 10v. the voltage at this pin swings 0 to v ref in unipolar mode and v ref in bipolar mode.v out (pin 13): dac voltage output. normally connected to r fb and to i out through a 22pf feedback capacitor in unipolar mode (15pf in bipolar mode). typically swings 10v. pi n fu n ctio n s uuu downloaded from: http:///
8 ltc1821 table 1 control inputs clr wr ld register operation 0 x x reset input and dac register to all 0s for ltc1821 and midscale for ltc1821-1 (asynchronous operation) 1 0 0 write input register with all 16 data bits 1 1 1 load dac register with the contents of the input register 1 0 1 input and dac register are transparent 1 clk = ld and wr tied together. the 16 data bits are written into the input register on the falling edge of the clk and then loaded into the dac register on the rising edge of the clk 1 1 0 no register operation truth table 96k 12k 12k 96k 48k 96k 48k 96k decoder d15 (msb) d13 d14 d15 d12 d11 d0 (lsb) load v cc ref r fb v out i out dnc* clr 7 dgnd *connected internally. do not connect external circuitry to these pins 1 1821 bd dac register 48k 48k 48k 48k 48k 48k 48k 12k 23 2 r1 10 r com 9 8 ld 24 25 d14 26 d4 36 d3 3 d2 4 d0 6 d1 5 wr 18 nc 22 13 dnc* 19 dnc* 21 v + 15 14 v 20 agnds 16 agndf 17 12 r ofs 11 ? 12k wr input register ??? rst rst + block diagra w downloaded from: http:///
9 ltc1821 descriptionthe ltc1821 is a 16-bit voltage output dac with a full parallel 16-bit digital interface. the device can operate from 5v and 15 supplies and provides both unipolar 0v to 10v or 0v to 10v and bipolar 10v output ranges from a 10v or ?0v reference input. additionally, the powersupplies for the ltc1821 can go as low as 4.5v and 4.5v. in this case for a 2.5v or 2.5v reference, the output range is 0v to 2.5v, 0v to 2.5v and 2.5v. the ltc1821 has three additional precision resistors on chip for bipolaroperation. refer to the block diagram regarding the fol- lowing description. the 16-bit dac consists of a precision r-2r ladder for the 13 lsbs. the three msbs are decoded into seven seg- ments of resistor value r. each of these segments and the r-2r ladder carries an equally weighted current of one eighth of full scale. the feedback resistor r fb and 4-quadrant resistor r ofs have a value of r/4. 4-quadrant resistors r1 and r2 have a magnitude of r/4. r1 and r2together with an external op amp (see figure 2) inverts the reference input voltage and applies it to the 16-bit dac input ref, in 4-quadrant operation. the ref pin presents a constant input impedance of r/8 in unipolar mode and r/12 in bipolar mode. the ltc1821 contains an onboard precision high speedamplifier. this amplifier together with the feedback resis- tor (r fb ) form a precision current-to-voltage converter for the dac? current output. the amplifier has very low noise,offset, input bias current and settles in less than 2 m s to 0.0015% for a 10v step. it can sink and source 22ma( 15v) typically and can drive a 300pf capacitive load. an added feature of these devices, especially for waveformgeneration, is a proprietary deglitcher that reduces glitch impulse to below 2nv-s over the dac output voltage range. digital section the ltc1821 has a 16-bit wide full parallel data bus input. the device is double-buffered with two 16-bit registers. the double-buffered feature permits the update of several dacs simultaneously. the input register is loaded directly from a 16-bit microprocessor bus when the wr pin is brought to a logic low level. the second register (dac register) is updated with the data from the input register when the ld signal is brought to a logic high. updating the dac register updates the dac output with the new data. to make both registers transparent in flowthrough mode, tie wr low and ld high. however, this defeats the deglitcher operation and output glitch impulse may increase. the deglitcher is activated on the rising edge of the ld pin. the applicatio n s i n for m atio n wu u u data ld clr 1821 td t wr t ds t ld t dh t lwd wr t clr ti i g diagra u ww downloaded from: http:///
10 ltc1821 versatility of the interface also allows the use of the inputand dac registers in a master slave or edge- triggered configuration. this mode of operation occurs when wr and ld are tied together. the asynchronous clear pin resets the ltc1821 to zero scale and the ltc1821-1 to midscale. clr resets both the input and dac registers.these devices also have a power-on reset. table 1 shows the truth table for the ltc1821. figure 1. unipolar operation (2-quadrant multiplication) v out = 0v to v ref applicatio n s i n for m atio n wu u u v cc ltc1821 r fb r fb r ofs r ofs 5v ld ld 10 9 24 23 7 18 2 13 15 20 117 16 r1 r com 8 ref 11 12 0.1 f 0.1 f 15v 15v 14 i out v out 22pf v out = 0v to ? ref 1821 f01 agndf agnds dgnd wr 25 to 36, 3 to 6 wr clr dnc* dnc* clr v ref + 16-bit dac r1 r2 16 data inputs 0.1 f unipolar binary code table digital input binary number in dac register ? ref (65,535/65,536) ? ref (32,768/65,536) = v ref /2 ? ref (1/65,536) 0v lsb 1111 1111 1111 0000 0000 0000 0000 0000 0001 0000 0000 0000 analog output v out msb 11111000 0000 0000 19 dnc* 21 nc 22 v v + *do not connect unipolar mode(2-quadrant multiplying, v out = 0v to v ref ) the ltc1821 can be used to provide 2-quadrant multiply- ing operation as shown in figure 1. with a fixed 10v reference, the circuit shown gives a precision unipolar 0v to 10v output swing. downloaded from: http:///
11 ltc1821 figure 2. bipolar operation (4-quadrant multiplication) v out = v ref to v ref bipolar mode(4-quadrant multiplying, v out = v ref to v ref ) the ltc1821 contains on chip all the 4-quadrant resistorsnecessary for bipolar operation. 4-quadrant multiplying applicatio n s i n for m atio n wu u u operation can be achieved with a minimum of externalcomponents? capacitor and a single op amp, as shown in figure 2. with a fixed 10v reference, the circuit shown gives a precision bipolar 10v to 10v output swing. v cc ltc1821 r fb r fb r ofs r ofs 5v ld ld 10 9 24 23 718 2 13 15 20 117 16 r1 r com 8 6 32 ref 11 12 0.1 f 0.1 f 15v 15v 14 i out v out 22pf v out = ? ref to v ref 1821 f02 agndf agnds dgnd wr 25 to 36, 3 to 6 wr clr dnc* dnc* clr v ref + 16-bit dac r1 r2 16 data inputs 0.1 f 19 dnc* 21 nc 22 v v + + lt1001 bipolar offset binary code table digital input binary number in dac register v ref (32,767/32,768) v ref (1/32,768) 0v? ref (1/32,768) ? ref lsb 1111 1111 1111 0000 0000 0001 0000 0000 0000 1111 1111 1111 0000 0000 0000 analog output v out msb 11111000 1000 0111 0000 *do not connect downloaded from: http:///
12 ltc1821 precision voltage reference considerationsbecause of the extremely high accuracy of the 16-bit ltc1821, careful thought should be given to the selection of a precision voltage reference. as shown in the section describing the basic operation of the ltc1821, the output voltage of the dac circuit is directly affected by the voltage reference; thus, any voltage reference error will appear as a dac output voltage error. there are three primary error sources to consider when selecting a precision voltage reference for 16-bit applica- tions: output voltage initial tolerance, output voltage tem- perature coefficient (tc), and output voltage noise. initial reference output voltage tolerance, if uncorrected, generates a full-scale error term. choosing a reference with low output voltage initial tolerance, like the lt1236 ( 0.05%), minimizes the gain error due to the reference; however, a calibration sequence that corrects for systemzero- and full-scale error is always recommended. a reference? output voltage temperature coefficient af- fects not only the full-scale error, but can also affect the circuit? inl and dnl performance. if a reference is chosen with a loose output voltage temperature coeffi- cient, then the dac output voltage along its transfer characteristic will be very dependent on ambient condi- tions. minimizing the error due to reference temperature coefficient can be achieved by choosing a precision refer- ence with a low output voltage temperature coefficient and/or tightly controlling the ambient temperature of the circuit to minimize temperature gradients. as precision dac applications move to 16-bit and higher performance, reference output voltage noise may contrib- ute a dominant share of the system? noise floor. this in turn can degrade system dynamic range and signal-to- noise ratio. care should be exercised in selecting a voltage table 2. partial list of ltc precision references recommendedfor use with the ltc1821, with relevant specifications initial temperature 0.1hz to 10hz reference tolerance drift noise lt1019a-5, 0.05% 5ppm/ c1 2 m v p-p lt1019a-10 lt1236a-5, 0.05% 5ppm/ c3 m v p-p lt1236a-10 lt1460a-5, 0.075% 10ppm/ c2 0 m v p-p lt1460a-10 lt1790a-2.5 0.05% 10ppm/ c1 2 m v p-p applicatio n s i n for m atio n wu u u reference with as low an output noise voltage as practicalfor the system resolution desired. precision voltage refer- ences, like the lt1236, produce low output noise in the 0.1hz to 10hz region, well below the 16-bit lsb level in 5v or 10v full-scale systems. however, as the circuit band- widths increase, filtering the output of the reference may be required to minimize output noise. grounding as with any high resolution converter, clean grounding is important. a low impedance analog ground plane and star grounding should be used. agndf and agnds must be tied to the star ground with as low a resistance as possible. when it is not possible to locate star ground close to agndf and agnds, separate traces should be used to route these pins to the star ground. this minimizes the voltage drop from these pins to ground due to the code dependent current flowing into the ground plane. if the resistance of these separate circuit board traces exceeds 1 w , the circuit of figure? 3 eliminates this code dependent voltage drop error for high resistance traces.to calculate pc track resistance in squares, divide the length of the pc track by the width and multiply this result by the sheet resistance of copper foil. for 1 oz copper ( ? 1.4 mils thick), the sheet resistance is 0.045 w per square. downloaded from: http:///
13 ltc1821 figure 3. driving agndf and agnds with a force/sense amplifier applicatio n s i n for m atio n wu u u 15v 0.1 f 0.1 f C15v 1000pf v cc ltc1821 r fb r fb r ofs r ofs 5v 10 9 2 r1 r com 8 ref 11 12 0.1 f 14 22pf v out = 0v to C10v v out 1821 f03 C + C + lt1001 alternate amplifier for optimum settling time performance 16-bit dac r1 r2 i out 25 to 36, 3 to 6 16 data inputs ld wr clr 19 dgnd 13 20 v C v + 15 3 6 6 17 17 16 16 era82.004 2 lt1236a-10 2 6 10v 15v 4 ld 24 23 718 wr clr dnc* dnc* 19 dnc* 21 nc agndf agnds 22 C + lt1468 3 era82.004 2 200 200 *do not connect agnds agndf downloaded from: http:///
14 ltc1821 17-bit sign magnitude output voltage dac with bipolar zero error of 140 m v (0.92lsb at 17 bits) v cc 15pf v C v + 0.1 f 0.1 f ltc1821 r fb r fb r ofs r ofs 5v ld 10 3 ltc203ac 2 1 6 4 2 15v 14 15 16 9 2 6 32 16 117 r1 r com 8 ref 11 12 14 0.1 f i out 22pf v out 1821 ta03 dgnd agndf agnds C + lt1468 25 to 36, 3 to 6 sign bit wr clr C + 16-bit dac r1 r2 16 data inputs lt1236a-10 ld 24 23 718 wr clr dnc* dnc* 19 dnc* 21 nc 22 13 15 20 0.1 f C15v 15v v out 0.1 f v C v + *do not connect typical applicatio n u downloaded from: http:///
15 ltc1821 dimensions in inches (millimeters) unless otherwise noted. gw package 36-lead plastic ssop (wide 0.300) (ltc dwg # 05-08-1642) gw36 ssop 1098 0 C 8 typ 0.231 C 0.3175 (0.0091 C 0.0125) 0.610 C 1.016 (0.024 C 0.040) 7.417 C 7.595** (0.292 C 0.299) 45 0.254 C 0.406 (0.010 C 0.016) 2.286 C 2.387 (0.090 C 0.094) 0.127 C 0.305 (0.005 C 0.0115) 2.463 C 2.641 (0.097 C 0.104) 0.800 (0.0315) bsc 0.304 C 0.431 (0.012 C 0.017) 15.290 C 15.544* (0.602 C 0.612) 1 2 3 4 5 6 7 8 9 101112131415161718 10.160 C 10.414 (0.400 C 0.410) 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 dimension does not include mold flash. mold flash shall not exceed 0.152mm (0.006") per side * note: dimensions are in millimeters dimension does not include interlead flash. interlead flash shall not exceed 0.254mm (0.010") per side ** package descriptio n u information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. downloaded from: http:///
16 ltc1821 ? linear technology corporation 2000 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear-tech.com 1821f lt/tp 0401 4k ? printed in usa part number description comments adcs ltc1417 low power 400ksps, 14-bit adc 20mw, single or 5v, serial i/o ltc1418 14-bit, 200ksps, single 5v adc 15mw, serial/parallel 10v ltc1604/ltc1608 16-bit, 333ksps/500ksps, 5v adc 90db sinad, 100db thd, 2.5v inputs ltc1605/ltc1606 16-bit, 100ksps/250ksps, single 5v adc 10v inputs, 55mw/75mw, byte or parallel i/o ltc1609 16-bit, 200ksps, single 5v adc 10v inputs, 65mw, serial i/o ltc2400 24-bit, micropower ds adc in so-8 0.3ppm noise, 4ppm inl, 10ppm total unadjusted error, 200 m a ltc2410 24-bit, fully differential, no latency ds adc 0.16ppm noise, 2ppm inl, 10ppm total unadjusted error, 200 m a dacs ltc1591/ltc1597 parallel 14-/16-bit current output dacs on-chip 4-quadrant resistors ltc1595/ltc1596 serial 16-bit current output dacs in so-8/s16 low glitch, 1lsb maximum inl, dnl ltc1599 parallel 2 byte 16-bit current output dac on-chip 4-quadrant resistors ltc1650 serial 16-bit 5v voltage output dac low noise and low glitch rail-to-rail v out ltc1654 dual 14-bit rail-to-rail v out dac programmable speed/power, 3.5 m s/750 m a, 8 m s/450 m a ltc1655/ltc1655l serial 5v/3v 16-bit voltage output dac in so-8 low power, deglitched, rail-to-rail v out ltc1657/ltc1657l parallel 5v/3v 16-bit voltage output dac low power, deglitched, rail-to-rail v out ltc1658 serial 14-bit voltage output dac low power, 8-lead msop rail-to-rail v out op amps lt1001 precision operational amplifier low offset, low drift lt1468 90mhz, 22v/ m s, 16-bit accurate op amp precise, 1 m s settling to 0.0015% references lt1019 bandgap reference 0.05% initial tolerance, 5ppm/ c lt1236 precision buried zener reference 0.05% initial tolerance, low noise 3 m v p-p lt1460 micropower bandgap reference 0.075% initial tolerance, 10ppm/ c lt1790 sot-23 micropower, low dropout reference 0.05% initial tolerance, 10ppm/ c related parts downloaded from: http:///

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